Radio communication devices use transmitters and antennas to provide for the efficient transmission of radio frequency (RF) communication signals. The transmitter portion of a communication device includes a power amplifier to amplify the radio frequency signals before they are coupled to the antenna for transmission. As modern radio communication systems work in narrow frequency bands, the transmitters' circuitries require RF power amplifiers able to operate in a linear fashion. Linear amplification is used to prevent distortion of the modulated signal and minimize the interference. However non-linearity of real world RF amplifiers appears when they are operated at high drive levels near the saturation point. Similar situations may be caused by environmental conditions. For example, a transmitter operating near an electromagnetically reflective structure may be susceptible to energy reflected back through the antenna into the transmitter.
There are known in the art transmitters with improved linearity. One method of linearization of transmitters is to use a Cartesian feedback loop based linearizer circuit. The Cartesian feedback linearizer permits linearity of the transmitter to be maintained while still allowing RF power amplifier to work close to its saturation point, thus maintaining good efficiency. To protect against changes in load impedance as a result of reflected energy, an isolator or circulator is often inserted between the antenna and the power amplifier. The isolator protects the power amplifier by absorbing the reflected energy and preventing it from reaching the amplifier. The isolator directs the reflected energy to an absorptive load termination. Although the isolator generally works well, it adds significant cost, size, and weight to the design of a radio communication device. Isolators are narrowband, expensive and have large physical dimensions (especially at low frequencies).
A linearizer circuit, such as a Cartesian feedback linearizer, optimizes a performance of a transmitter, for example, to comply with linearity or output power specifications of a communication system, or optimizes an operating efficiency of the transmitter power amplifier. Operational parameters of the transmitter are adjusted to optimize the transmitter performance and include amplifier bias voltage level, input power level, and phase shift of a signal around a feedback path. Such adjustments are performed by a microprocessor.
Due to sensitivity performance of such transmitter circuits, a range of control and adjustment circuits and/or components are used so that a linear and stable output signal can be achieved under all operating circumstances.
All linearization techniques require a finite amount of time in which to linearize the performance of a given amplifying device. The linearization of the amplifying device is often achieved by initially applying a training sequence to a linearizer circuit and an amplifying device in order to determine levels of phase and gain distortion introduced by the linearization loop and the amplifying device. Once phase and gain distortion levels have been determined, they can be compensated for, generally by adjusting feedback components/parameters.
To accommodate for such a linearization technique, communication systems typically allocate specific training periods for individual users to train their transmitters. The TErrestrial Trunked RAdio (TETRA) standard includes a time frame, termed a Common Linearization Channel (CLCH) as is described in UK Patent Application No. 9222922.8, to provide a full-training period approximately once every second. The CLCH frame allows a radio to train prior to gaining access to the TETRA communication system. However, a radio having to wait up to one second before training and then accessing the system is undesirable. To minimize the effect of this significant delay in call set-up times, and also provide an additional period for fine tuning a radio's output characteristics, e.g., due to changes in temperature, supply voltage or frequency of operation, a reduced training sequence has been inserted at the beginning of each TETRA traffic time slot for a radio allocated that slot to perform a minimal amount of training or fine tuning. This period may be used for phase training.
An example of such a training sequence is described in U.S. Pat. No. 5,066,923 to Motorola Inc., which describes a training scheme where a phase of a transmitter amplifier is adjusted in an ‘open-loop’ mode and a gain of a transmitter amplifier is adjusted when a feedback loop is closed.
During phase training, a Cartesian feedback linearizer may be configured to be ‘open loop,’ for example, a switch may be used to prevent the feedback signal from being combined with a signal routed through the transmitter.
FIG. 1 illustrates a phase diagram 100 with a perfect I/Q quadrature balance, namely a 90-degree phase difference between the I-channel 120 and the Q-channel 110. One known method for controlling/setting phase and amplitude levels around a feedback loop is described here. The Cartesian loop may be opened and a positive baseband signal applied to an input of the I-channel. Phase training control circuitry monitors a signal before switching on a Q-channel, indicated as VFQ 140. A successive approximation register (SAR) phase training algorithm controls a phase shifter and is arranged to minimize the VFQ voltage. Once the SAR algorithm has completed, a phase correction signal corrects a loop phase from VFQ 140 to VFQ—T 130 by an angle β 150. A voltage value measured on the Q-channel prior to the switch may then be reduced to a level close to zero. In one embodiment of the invention, the phase training and adjustment process is repeated for a negative baseband signal input to the I-channel. Calculated results from both positive and negative training applied to the I-channel are averaged and used to adjust a phase shift around both the I-channel loop and the Q-channel loop. In practice, a perfect I-Q 90-degree relationship is rarely achieved. This imbalance results from various component tolerances within the respective I and Q loops.
Cartesian feedback linearizers can be readily implemented for use with narrowband protocols having a channel bandwidth up to 150 kHz, such as TETRA, TETRA2, iDEN, and HSD/HPD, using the above described techniques. However, it would be desirable to use a Cartesian feedback linearizer with broadband protocols, which are protocols transmitted above 150 kHz, such as at LTE (Long Term Evolution), WiMax, WCDMA and EDGE, for at least the following reasons: 1) improved efficiency and higher power output for a given RF power amplifier; 2) improved Adjacent Channel Coupled Power (ACCP) for using an adjacent channel in an adjacent cell; and 3) improved EVM (Error Vector Magnitude). One problem with using a Cartesian feedback linearizer with broadband protocols is loop instability, which is due to increased delay in the transmitter path. If the delay in the transmitter path when using a broadband protocol is relatively large, then the stability of the Cartesian feedback linearizer can be at risk.
FIG. 2 illustrates a Cartesian feedback linearizer circuit 200. The bandwidth and stability of the Cartesian feedback linearizer circuit 200 is defined by loop gain, poles, and zeros of the loop. The loop in FIG. 1 has two poles, LP1 and LP2, and a zero Z1. A 1st fixed pole is at LP1 and a 2nd programmable pole is at LP2 along with a programmable zero Z1.
A signal having I and Q components, for example a narrowband signal such as a 25 kHz TETRA1 signal or a broadband signal such as a 5 MHz LTE signal, is input as an I-channel input 202 and a Q-channel input 230 into summing junctions 204, 232, respectively. The summed I channel input signal 202 is then input to a series of amplifiers A1 205 and A2 207 and a series of low-pass filters LP1 206 and LP2+Zero 209, where the signal is amplified and filtered. The summed Q channel input signal 230 is also input to a series of amplifiers A1 233 and A2 235 and a series of low-pass filters LP1 234 and LP2+Zero 237, where the signal is amplified and filtered. The amplified input signals 202, 232 are then up-converted by mixing them with a signal from local oscillator 240 in mixers 208, 238, respectively.
The up-converted signals are summed in a summing junction 210 and then routed to an RF power amplifier 212, where a portion of an amplified RF signal is fed back via a directional coupler 214 and the rest of the amplified RF signal is transmitted through an antenna 216. The portion of the amplified RF signal is routed to a down-conversion mixers 218 and 220 where it is mixed with a phase-shifted version of a signal from the local oscillator 240, the phase-shifted version of the local oscillator signal having been phase-shifted by a phase shifter 242.
Looking at FIG. 2, an example of the problem that increased delay can have on the stability of a Cartesian feedback linearizer circuit can be illustrated through two examples. In one example, if the Cartesian feedback linearizer circuit 200 is used to transmit a narrowband signal such as a 25 kHz TETRA1 signal, assuming: low-pass filters LP1 206, 234 are set at 2.7 kHz; low-pass filters LP2 209, 237 are set at 18 kHz; and the programmable Zero for low-pass filters LP2 209, 237 is set at 390 kHz; then the bandwidth for the Cartesian feedback linearizer circuit would be 407 kHz and the phase margin would be 48 degrees. However, if the Cartesian feedback linearizer circuit 200 is used to transmit a broadband signal such as a 5 MHz LTE signal, using a scaling factor of 200 (5 MHz/25 kHz=200), and assuming: low-pass filters LP1 206, 234 are set at 2.7*200=540 kHz; low-pass filters LP2 209, 237 are set at 18*200=3600 kHz; and the programmable Zero Z1 for low-pass filters LP2 209, 237 is set at 390*200=78000 kHz; then the bandwidth for the Cartesian feedback linearizer circuit would be 407*200=81400 kHz and the phase margin, assuming no delays in the lines of the Cartesian feedback linearizer circuit, would still be 48 degrees.
However, it is not uncommon for there to be a delay introduced into the lines of the Cartesian feedback linearizer circuit, due to the RF power amplifier, couplers, baluns, and other elements which could be introduced into the Cartesian feedback linearizer circuit. The delay can also be a function of VSWR (voltage standing wave ratio), the RF power amplifier supply voltage, temperature, and RF frequency. Assuming a delay of 10 nanoseconds, the phase shift due to this delay for the narrowband 25 kHz TETRA1 signal would be:Δφ=360*Floop*τ=360*407 kHz*10 n sec=1.5 deg  (Equation 1).This delay would not significantly affect the stability of the Cartesian feedback linearizer circuit. However, if a delay of 10 nanoseconds where introduced into the Cartesian feedback linearizer circuit producing the broadband 5 MHz LTE signal, the phase shift due to this 10 ns delay would be:Δφ=360*Floop*τ=360*81400 kHz*10 n sec=293 deg  (Equation 2).The above phase shift of 293 degrees would significantly affect the stability of the Cartesian feedback linearizer circuit, and result in an unstable circuit. For the feedback loop to be stable, the overall phase shift of the feedback loop at loop bandwidth should be less then 180 degrees. Phase margin is defined as the difference between 180 degrees and the phase shift at 0 db loop bandwidth frequency.
Phase shifts due to a delay introduced into the broadband Cartesian feedback linearizer circuit present another problem that does not exist in narrowband Cartesian feedback linearizer circuits: gain margin. Since the phase shifts due to a delay increase linearly with frequency, when the phase of the Cartesian feedback linearizer circuit is 180 degrees or more, sufficient gain margin should be present. In order to insure that sufficient gain margin is present, an additional programmable Zero, Z2, is used with low-pass filters LP2 209, 237 at frequencies above 150 MHz in order to ensure stability. The phase shift due to a delay introduced into the broadband Cartesian feedback linearizer circuit, also known as delay line phase shift, for a circuit which operates with signals above 150 MHz, can be at least three times larger then for a circuit which operates with signals at, for example, 50 MHz. For example, if at 50 MHz a signal has a delay line phase of 35 degrees, then at 150 MHz a signal may have a delay line phase of 105 degrees, for example.
As a result, delays introduced into broadband Cartesian feedback linearizer circuits can have a significant effect on the operation and stability of the circuits. Thus, there exists a need to provide an improved wireless communication unit with linearizer circuit, wherein the abovementioned disadvantages may be alleviated.